ERRATUM: ANALYSIS OF A CONTROLLER-BASED ALL-DIGITAL PHASE-LOCKED LOOP

摘要

This paper was published online in July, 2015 [Volume 15, Number 1, Pages 57-73]. In this paper, we performed modeling and analysis of a controller-based all-digital phase-locked loop (ADPLL). However, we made a mistake in the calculation of the step response of the ADPLL to validate the model using behavior-level simulation. The following sentences in the pages 69, 70, 71 should be corrected and Figure 5 should be replaced as follows.