Very high density trench gate power MOSFET using simplified four-mask process

摘要

A new and simplified process for fabricating a high density n-channel trench gate power MOSFET using four mask layers and a sidewall spacer technique is proposed. Use of this process has enabled a remarkably increased high density (100 Mcell/in/sup 2/) trench MOSFET with a cell pitch of 2.5 /spl mu/m to be realised. Furthermore, the p-base, n-source, and trench gate regions were formed by the same mask layer, which made it possible to reduce the number of processing steps. The fabricated device had a low specific on-resistance of 0.7 m/spl Omega/cm/sup 2/ with a breakdown voltage of 46 V.