D-band divide-by-3 injection-locked frequency divider in 65 nm CMOS

摘要

A D-band divide-by-3 injection-locked frequency divider (ILFD) is realised in 65 nm CMOS process. The ILFD adopts the dual-injection and current-reused techniques. It achieves the input locking range of 122.4??125.4 GHz and its power consumption is 9.1 mW for a supply of 1.3 V excluding buffers and the biasing circuit.