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Double random sources: low-cost method to enhance local optima escaping ability in CMOS-type Ising chips

机译:双随机源:低成本方法,用于增强CMOS型Ising芯片的局部最优逃逸能力

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摘要

The local optima escaping ability, which is critical for both accuracy and efficiency of CMOS-type Ising chips, is greatly affected by the probability to accept a worse state. Theoretically, such probability is determined by both energy barriers and temperature. However, due to the implementation complexity, the energy barrier is not considered in existing CMOS-type Ising chips. We propose a double random source based method, which re-correlates the probability above with the energy barrier, while eliminating calculating the energy barrier for low cost is proposed. The experiments demonstrate that the method can improve the accuracy of CMOS-type Ising chips by 7.6%, confining the error within 1%. Moreover, it can accelerate the convergence process by 100×.
机译:对于CMOS型Ising芯片的准确性和效率而言至关重要的局部最佳转义能力,受接受更坏状态的可能性的影响很大。从理论上讲,这种可能性由能垒和温度共同决定。但是,由于实现的复杂性,在现有的CMOS型Ising芯片中没有考虑能垒。我们提出了一种基于双随机源的方法,该方法将上述概率与能垒重新关联,同时提出了为低成本而消除计算能垒的建议。实验表明,该方法可以将CMOS型Ising芯片的精度提高7.6%,将误差限制在1%以内。而且,它可以将收敛过程加速100倍。

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