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Stress Liner Effects for 32-nm SOI MOSFETs With HKMG

机译:使用HKMG的32nm SOI MOSFET的应力线效应

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摘要

Strain effects from stress liners on silicon-on-insulator MOSFETs with high- $k$ dielectric and metal gate (HKMG) are reported. By thoroughly evaluating their impact on drive current, mobility, and threshold voltage, the intrinsic performance gain of stress liners is quantified at the 32-nm node with mobility enhancement identified as the major source. It is also experimentally demonstrated that advantageous stress liners can reduce gate leakage currents for MOSFETs with HKMG.
机译:据报道,应力衬层对具有高介电常数和金属栅极(HKMG)的绝缘体上硅MOSFET的应变影响。通过彻底评估它们对驱动电流,迁移率和阈值电压的影响,可以在32 nm节点处量化应力衬层的固有性能增益,并确定迁移率增强是主要来源。实验还证明,有利的应力衬层可以减少带有HKMG的MOSFET的栅极泄漏电流。

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