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首页> 外文期刊>Electron Devices, IEEE Transactions on >A Charge-Trapping Model for the Fast Component of Positive Bias Temperature Instability (PBTI) in High- (kappa ) Gate-Stacks
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A Charge-Trapping Model for the Fast Component of Positive Bias Temperature Instability (PBTI) in High- (kappa ) Gate-Stacks

机译:高(kappa)门堆叠中正偏置温度不稳定性(PBTI)的快速分量的电荷捕获模型

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摘要

We propose a physical model for the fast component ( (<1) s) of the positive bias temperature instability (PBTI) process in SiOx/HfO2 gate-stacks. The model is based on the electron-phonon interaction governing the trapping/emission of injected electrons at the preexisting defects in the dielectric stack. The model successfully reproduces the experimental time dependences of the (V_{mathrm {{TH}}}) shift on both stress voltage and temperature. Simulations allow the extraction of the physical characteristics of the defects contributing to PBTI, which are found to match those assisting the leakage current in these stacks (i.e., oxygen vacancies).
机译:针对SiO x / HfO 2 栅堆叠中的正偏压温度不稳定性(PBTI)过程的快速分量((<1)s),我们提出了一个物理模型。该模型基于电子-声子相互作用,该相互作用控制着电介质堆叠中预先存在的缺陷处注入电子的俘获/发射。该模型成功地重现了(V_ {mathrm {{TH}}})位移对应力电压和温度的实验时间依赖性。仿真可以提取出有助于PBTI的缺陷的物理特性,发现这些缺陷与辅助这些堆叠中泄漏电流的缺陷(即氧空位)相匹配。

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