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首页> 外文期刊>IEEE Electron Device Letters >Low-Voltage Steep Turn-On pMOSFET Using Ferroelectric High- $kappa$ Gate Dielectric
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Low-Voltage Steep Turn-On pMOSFET Using Ferroelectric High- $kappa$ Gate Dielectric

机译:使用铁电高kappa栅极电介质的低压陡峭导通pMOSFET

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摘要

Power consumption is the most difficult challenge for CMOS integrated circuits. Here, we demonstrate experimentally a novel steep turn-on pMOSFET for low-voltage operation for the first time, which exhibits 5–60 mV/decade SS, wide voltage range for ${rm SS}<60~{rm mV}/{rm decade}$ , sturdy ${<}{rm 60}~{rm mV}/{rm decade}$ SS at 85$^{circ}{rm C}$, faster transistor turn-on at above threshold voltage, and lower off-state leakage by greater than three orders of magnitude. Such improved leakage current is crucial to decrease the off -state leakage current in sub-1X nm CMOS. This was achieved using ferroelectric high-$kappa$ ZrHfO gate dielectric pMOSFET.
机译:功耗是CMOS集成电路最困难的挑战。在这里,我们首次实验性地展示了一种新颖的用于低压工作的陡峭导通pMOSFET,其展现5-60 mV /十倍SS,宽电压范围为$ {rm SS} <60〜{rm mV} / { rm rm} $,坚固的$ {<} {rm 60}〜{rm mV} / {rm十年} $ SS在85 $ ^ {circ} {rm C} $,在高于阈值电压时更快的晶体管导通,以及将断态泄漏降低了三个数量级以上。这种改善的泄漏电流对于降低亚1X nm CMOS中的关态泄漏电流至关重要。这是通过使用铁电高kZrHfO栅极电介质pMOSFET来实现的。

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