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Signal Integrity and Power Integrity

机译:信号完整性和功率完整性

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Welcome to the Signal Integrity and Power Integrity Column!, With great pleasure, I introduce to you a contribution by Biyao Zhao and co-authors about a systematic approach for Power Integrity (PI) analysis of power distribution networks (PDNs) in multi-layered printed circuit boards (PCBs). Power Integrity is an essential consideration for high-speed designs. Noise in PDNs due to poor designs may lead to malfunction or failure of high-speed circuit systems. One main objective of the PDN design is to achieve target impedance. For this purpose, various methodologies have been proposed in the literature to address the PI modeling and analysis of PDNs, many of which are already in commercial use.
机译:欢迎来到信号完整性和电力完整性列!非常愉快,我向您介绍了Biyao Zhao和共同作者关于多层电力分布网络(PINS)的系统方法的贡献印刷电路板(PCB)。电力完整性是高速设计的基本考虑因素。由于设计不佳,PDN中的噪声可能导致高速电路系统的故障或失效。 PDN设计的一个主要目的是实现目标阻抗。为此目的,在文献中提出了各种方法来解决PIN的PI建模和分析,其中许多已经在商业用途。

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