An Occurrence Mechanism and Method for Improving the Output Waveform Distortion of CMOS Logic ICs

摘要

Waveform distortion at a signal edge generally falls into two categories: hysteresis type and non-hysteresis type. Non-hysteesis type distortion has a flat portion in the Signal transition, but it will not give any serious problem Except for timing oriented circuits. Hysteresis type distor- Tion which makes a round trip between two threshold levels Will affect logic judgment. Incorrect in formation will be Transmitted if the signal is seriously distorted. It is important To understand the relationship between spectrum modifica- Tion and waveform distortion.