Shift register makes a fast counter

摘要

Asic designs commonly re-quire a fast, synchronous counter. The carry propagation is the limiting factor in a fast-counter i nplementation. In a binary synchronous counter, a logic function of the value of all the bits in the counter determines the value of the most significant bit in the next clock edge. When the counter is long and its frequency is high, this function evaluation can take longer than one clock cycle.