Dual-input sample-and-hold amplifier uses no external resistors

摘要

At least two classic ways exist to address applications requiring sampling of a sum of analog voltages. The most common way is to cascade a classic analog adder and a sample-and-hold amplifier. A classic analog adder is an op amp plus at least three precision resistors. The values of these resistors should be as low as possible so as not to deteriorate the bandwidth of the adder. On the other hand, such low-value resistors dissipate power. Further, the configuration of an adder-sample-and-hold amplifier suffers also from an- other drawback, which manifests itself when the two input voltages are close in magnitude but of opposite polarity. In this case, even if the magnitude of the input voltages is high, the resulting sum is low or no voltage if the magnitudes of input voltages are equal. Sampling a low voltage usually involves a high relative error of the output voltage because each amplifier has some dynamic errors, such as residual parasitic transfer of charge into the storing capacitor.