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首页> 外文期刊>Journal of Zhejiang University. Science, A >New design of sense amplifier for EEPROM memory
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New design of sense amplifier for EEPROM memory

机译:EEPROM存储器的读出放大器的新设计

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摘要

We present a new sense amplifier circuit for EEPROM memory. The topology of the sense amplifier uses a voltage sensing method, having low cost and low power consumption as well as high reliability. The sense amplifier was implemented in an EEPROM realized with an SMIC 0.35-μm 2P3M CMOS embedded EEPROM process. Under the condition that the power supply is 3.3 V, simulation results showed that the charge time is 35 ns in the proposed sense amplifier, and that the maximum average current consumption during the read period is 40 μA. The novel topology allows the circuit to function with power supplies as low as 1.4 V. The sense amplifier has been implemented in 2-kb EEPROM memory for RFID tag IC applications, and has a silicon area of only 240 μm2.
机译:我们为EEPROM存储器提供了一种新的读出放大器电路。读出放大器的拓扑采用电压传感方法,具有低成本和低功耗以及高可靠性。读出放大器在使用SMIC 0.35-μm2p3mcmos嵌入式EEPROM过程实现的EEPROM中实现。在电源为3.3V的条件下,仿真结果表明,建议的读出放大器中的充电时间为35 ns,并且读取时段期间的最大平均电流消耗为40μA。新颖的拓扑结构允许电路与电源低至1.4 V的电源。读出放大器已在用于RFID标签IC应用的2-KB EEPROM存储器中实现,并且具有仅240μm2的硅面积。

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