Floating-bulk transistors: An alternative design technique for CMOS low-voltage analog circuits

摘要

This letter details a novel floating-bulk transistor technique for low-voltage design. The approach is derived from two previous well-known techniques: bulk-driven and quasi floating-gate. The floating-bulk technique uses an input capacitive coupling through a floating bulk of a PMOS allowing modulation of the drain current. A fabricated common-source amplifier was tested on CMOS 0.5 μm technology and the feasibility of the proposal was demonstrated.