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Gate Drivers for Medium-Voltage SiC Devices

机译:用于中电压SIC器件的栅极驱动器

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Extensive research in wide-bandgap material technology such as silicon carbide (SiC) has led to the development of medium-voltage (MV) power semiconductor devices with blocking voltages of 3.3 to 15 kV. When these devices are used in various applications, they are exposed to a high peak voltage stress and a very high $dv/dt$ (50–100 V/ns). These impose stringent requirements on the gate driving stage for these devices in terms of featuring a high isolation voltage capability along with a high $dv/dt$ ruggedness, which makes it necessary to have an ultralow coupling capacitance between primary and secondary sides of the gate drivers. One of the key issues in achieving this MV insulation pertains to the necessary clearance and creepage requirements, as defined in IEC 61800-5-1 standards. While the successful operation of these gate drivers is demonstrated in MV converter applications such as solid-state transformers, and MV grid-connected inverters, substantial research needs to be carried out to improve the gate drivers’ performance and provide a plug-and-play solution. This article aims to comprehensively review these gate drivers and consolidate various required design features concerning their galvanic isolation stage, based on normal and short-circuit operation of MV high-power converter systems. Different device short-circuit protection schemes for these gate drivers are explored in detail. Additional applications and functionalities of the gate drivers, including gate drivers used in the series-connection of MV devices and intelligent gate drivers, are also provided in brief. Based on prior research, this review aims to provide design choices and guidelines for the gate drivers, accelerating the growth and deployment of MV SiC devices for field applications.
机译:宽带隙材料技术的广泛研究,如碳化硅(SIC),导致了中电压(MV)功率半导体器件的开发,其中阻塞电压为3.3至15kV。当这些设备用于各种应用中时,它们会暴露于高峰电压应力和非常高的<内联公式XMLNS:MML =“http://www.w3.org/1998/math/mathml”xmlns:xlink =“http://www.w3.org/1999/xlink”> $ dv / dt $ (50-100 v / ns)。这些设备的栅极驱动级对这些设备的高度电压能力以及高<内联公式XMLNS:MML =“http://www.w3.org/1998/math/mathml”来说,这些设备对这些设备的栅极驱动级对这些设备进行了严格的要求。 XMLNS:XLink =“http://www.w3.org/1999/xlink”> $ DV / DT $ Ruggedness使得有必要在栅极驱动器的初级和次侧之间具有超级耦合电容。实现该MV绝缘材料的关键问题之一是必要的间隙和爬电要求,如IEC 61800-5-1标准所定义。虽然这些栅极驱动器的成功运行在MV转换器应用中,但需要进行实质性的研究,以提高门驱动程序的性能并提供即插即用解决方案。本文旨在全面审查这些门驱动程序,并基于MV高功率转换器系统的正常和短路操作,巩固其电流隔离阶段的各种所需的设计特征。详细探讨了这些栅极驱动器的不同设备短路保护方案。简要介绍了栅极驱动器的附加应用和栅极驱动器,包括用于MV设备和智能栅极驱动器的系列连接中的栅极驱动器。基于先前的研究,本综述旨在为栅极驱动程序提供设计选择和指导方针,加速MV SIC器件的生长和部署用于现场应用。

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