首页> 外文期刊>International Journal of Engineering Research and Applications >Design the High Speed Kogge-Stone Adder by Using
【24h】

Design the High Speed Kogge-Stone Adder by Using

机译:通过使用来设计高速Kogge-Stone加法器

获取原文
           

摘要

In this Technical era the high speed and low area of VLSI chip are very- very essential factors. Day by day number of transistors and other active and passive elements are growing on VLSI chip. In Integral part of the processor adders play an important role. In this paper we are using proposed kogge-stone adders for binary addition to reduce the size and increase the efficiency or processors speed. Proposing kogge stone adder provides less components, less path delay and better speed compare to other existing kogge stone adder and other adders. Here we are comparing the kogge stone adders of different-different word size from other adders. The design and experiment can be done by the aid of Xilinx 14.1i Spartan 3 device family.
机译:在这个技术时代,VLSI芯片的高速和小面积是非常重要的因素。在VLSI芯片上,晶体管以及其他有源和无源元件的数量日益增加。在处理器的集成部分中,加法器起着重要作用。在本文中,我们使用拟议的kogge-stone加法器进行二进制加法,以减小大小并提高效率或处理器速度。与其他现有的kogge石头加法器和其他加法器相比,提出kogg​​e石头加法器可提供更少的组件,更少的路径延迟和更好的速度。在这里,我们正在比较单词大小与其他加法器不同的kogge石头加法器。可以借助Xilinx 14.1i Spartan 3器件系列来进行设计和实验。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号