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Minimalist 4-bit Processor Focused on Processors Theory Teaching

机译:极简主义的4位处理器,专注于处理器理论教学

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Objectives: To design and implement a totally-functional 4-bit didactic processor, in order to be applied as a tool for improving the learning process of students of microprocessors courses, and to be used as a base for future applications. Methods/Analysis: This work was reached through the application of a final course project in microprocessor and digital circuit courses, where it was given to the students via web platform, just the basic block diagram (to use Bottom- Up methodology) and they had to complete or design collaboratively the rest of details or blocks which is necessary to work. This processor was implemented using hardware description languages such as: Very fast speed Hardware Description Language (VHDL) and Verilog, on Complex Programmable Logic Device (CPLD) and Field Programmable Gate Array (FPGA). Findings: The present one is used as a teaching tool for digital circuits and microprocessor courses in the Technology Faculty of District University (Bogotá, Colombia). This minimalist design of the processor was done to reduce the amount of resultant digital gates, in order to implement inside a small digital programmable device. As a result, it was obtained as a simple processor to start with the basic concepts in the learning process of micro-processors and a little improvement of final exams results due to the involving of students into real problems as collaborative designers. Novelty/ Improvements: Reduced design is capable to implement on small CPLD or to be implemented sometimes on FPGA to do parallel applications. Additionally, its reduced size helps to easily understand it and implementing by the students.
机译:目标:设计和实现全功能的4位教学处理器,以用作改善微处理器课程学生学习过程的工具,并为将来的应用奠定基础。方法/分析:这项工作是通过应用微处理器和数字电路课程的最终课程项目而完成的,该项目是通过Web平台提供给学生的,只是基本框图(使用自下而上的方法),并且他们共同完成或设计工作所需的其余细节或模块。该处理器是使用硬件描述语言实现的,例如:在复杂可编程逻辑器件(CPLD)和现场可编程门阵列(FPGA)上的超高速硬件描述语言(VHDL)和Verilog。调查结果:本课程被用作哥伦比亚大学波哥大分校技术学院的数字电路和微处理器课程的教学工具。处理器的这种极简设计是为了减少最终数字门的数量,以便在小型数字可编程设备内部实现。结果,它成为一个简单的处理器,从微处理器学习过程中的基本概念入手,并且由于学生作为协作设计师参与到实际问题中,最终考试成绩也有所改善。新颖性/改进:简化的设计能够在小型CPLD上实现,或者有时在FPGA上实现并行应用。此外,缩小的尺寸有助于轻松理解它并由学生实施。

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