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Designing of a Digital to Analog Convertor Fully in CMOS, 0.18μm, 1.8V Technology with SFDR more than 70dB

机译:完全采用CMOS,0.18μm,1.8V技术,SFDR大于70dB的数模转换器设计

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Background/Objectives: Nowadays in new system of communication, analog to digital and digital to analog converters are used plenteously. Digital to analog converters are converters that receive digital data and convert it to an analog signal. Methods/Statistical Analysis: In this study a digital to analog converter has been fully designed in CMOS, 0.18μm, 1.8V technology. Findings: Designed converter receive 6 low-worth first bits in the form of binary and 4 worthy last bits in the form of unary thermometer codes. Output of this converter is in the form of sinusoidal signal. This converter has high amounts of SNR and SFDR. Application: In conclusion, this study illustrated that different methods of designing can be compounded to achieve to complex designing with better performance.
机译:背景/目的:在当今的新通信系统中,大量使用模数转换器和数模转换器。数模转换器是接收数字数据并将其转换为模拟信号的转换器。方法/统计分析:在本研究中,已经完全采用0.18μm,1.8V CMOS工艺设计了数模转换器。结果:设计的转换器以二进制形式接收6个低值前位,以一元温度计代码形式接收4个有价值的后位。该转换器的输出为正弦信号形式。该转换器具有大量的SNR和SFDR。应用:总之,这项研究表明,可以将不同的设计方法进行组合,以实现具有更好性能的复杂设计。

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