Highly-Efficient Number-Crunching-Performance SoC Macros for Singular Value Decomposition

摘要

Depending from the specifications a huge design space, featuring up to thousands of possible implementations is available from the QRD-architecture template [1]. In order to support design-space exploration the parameterized cost model as well as routines for pruning (e.g., according to maximum latency), Pareto optimization etc. are implemented in a MATLAB-based optimization environment [2]. The execution time for a whole design space exploration (one set of specification parameters) is in the order of a few minutes only.