Optimum Design for Eliminating Back Gate Bias Effect of Silicon-on-insulator Lateral Double Diffused Metal-oxide-semiconductor Field Effect Transistor with Low Doping Buried Layer

摘要

An optimum design with silicon-on-insulator (SOI) device structure was proposed to eliminate back gate biaseffect of the lateral double diffused metal-oxide-semiconductor field effect transistor (LDMOSFET) and to improvebreakdown voltage. The SOI structure was characterized by low doping buried layer (LDBL) inserted between the siliconlayer and the buried oxide layer. The LDBL thickness is a key parameter to affect the strong inversion condition in theback MOS capacitor of the new SOI diode. The optimum design of LDBL thickness for the SOI diode was 2.65 μm. Furthermore,the breakdown capability has been improved 11%.