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Use of a Hysteresis Loop Activation Function to Enable an Analog Perceptron to Gain Memory

机译:使用磁滞回线激活功能来使模拟感知器获得内存

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With the advent of memristors, analog artificial neural networks are closer than ever. Neural computing is growing as a topic of research. In the context of analog artificial neural networks, the purpose of this research is to verify that a perceptron could gain a discrete memory from implementing a hysteresis loop in the activation function. The discrete memory is represented by the difference path of the hysteresis activation function that took from logic 1 to logic 0. To write to the memory, the input to the hysteresis loop would have to exceed threshold. To read the stored value, the input would have to be between the thresholds of the hysteresis function. In order to verify the perceptron's memory, a network with manually chosen weights is selected which acts as a shift register. The components of this network are assembled in a circuit simulation program. Functionally, the network receives two inputs: a data signal and an enable signal. The output of the network is a time-shifted version of previous input signals. A system whose output is a time-shifted version of the previous inputs is considered to have memory.
机译:随着忆阻器的出现,模拟人工神经网络比以往任何时候都更加紧密。神经计算正在成为研究的主题。在模拟人工神经网络的背景下,本研究的目的是验证感知器可以通过在激活函数中实现磁滞回线来获取离散存储。离散存储器由从逻辑1到逻辑0的磁滞激活函数的差异路径表示。要写入存储器,磁滞环路的输入必须超过阈值。要读取存储的值,输入必须在滞后功能的阈值之间。为了验证感知器的内存,选择了具有手动选择权重的网络,该网络充当移位寄存器。该网络的组件组装在电路仿真程序中。在功能上,网络接收两个输入:数据信号和启用信号。网络的输出是先前输入信号的时移版本。输出为先前输入的时移版本的系统被认为具有内存。

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