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DMPDS: A Fast Motion Estimation Algorithm Targeting High Resolution Videos and Its FPGA Implementation

机译:DMPDS:针对高分辨率视频的快速运动估计算法及其FPGA实现

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This paper presents a new fast motion estimation (ME) algorithm targeting high resolution digital videos and its efficient hardware architecture design. The new Dynamic Multipoint Diamond Search (DMPDS) algorithm is a fast algorithm which increases the ME quality when compared with other fast ME algorithms. The DMPDS achieves a better digital video quality reducing the occurrence of local minima falls, especially in high definition videos. The quality results show that the DMPDS is able to reach an average PSNR gain of 1.85 dB when compared with the well-known Diamond Search (DS) algorithm. When compared to the optimum results generated by the Full Search (FS) algorithm the DMPDS shows a lose of only 1.03 dB in the PSNR. On the other hand, the DMPDS reached a complexity reduction higher than 45 times when compared to FS. The quality gains related to DS caused an expected increase in the DMPDS complexity which uses 6.4-times more calculations than DS. The DMPDS architecture was designed focused on high performance and low cost, targeting to process Quad Full High Definition (QFHD) videos in real time (30 frames per second). The architecture was described in VHDL and synthesized to Altera Stratix 4 and Xilinx Virtex 5 FPGAs. The synthesis results show that the architecture is able to achieve processing rates higher than 53 QFHD fps, reaching the real-time requirements. The DMPDS architecture achieved the highest processing rate when compared to related works in the literature. This high processing rate was obtained designing an architecture with a high operation frequency and low numbers of cycles necessary to process each block.
机译:本文提出了一种针对高分辨率数字视频的新型快速运动估计(ME)算法及其高效的硬件架构设计。新的动态多点菱形搜索(DMPDS)算法是一种快速算法,与其他快速ME算法相比,它可以提高ME质量。 DMPDS实现了更好的数字视频质量,减少了局部最小值下降的发生,特别是在高清视频中。质量结果表明,与著名的Diamond Search(DS)算法相比,DMPDS能够实现1.85 dB的平均PSNR增益。与全搜索(FS)算法生成的最佳结果相比,DMPDS的PSNR损失仅为1.03 dB。另一方面,与FS相比,DMPDS降低了45倍以上的复杂度。与DS相关的质量提高导致DMPDS复杂度的预期增加,其使用的计算量是DS的6.4倍。 DMPDS体系结构的设计侧重于高性能和低成本,旨在实时(每秒30帧)处理四路全高清(QFHD)视频。该架构在VHDL中进行了描述,并与Altera Stratix 4和Xilinx Virtex 5 FPGA进行了综合。综合结果表明,该架构能够实现高于53 QFHD fps的处理速率,达到了实时要求。与文献中的相关作品相比,DMPDS体系结构实现了最高的处理速度。设计具有高工作频率和处理每个模块所需的循环次数少的体系结构时,可以获得很高的处理速率。

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