Low Area FPGA Implementation of DROM-CSLA-QTL Architecture for Cryptographic Applications

摘要

Nowadays, several techniques are implemented for the cryptosystems to provide security in communicationsystems. The major issues detected in conventional methods are the weakness against different attack,unacceptable data expansion, and slow performance speed. In this paper, a method Dual-port Read OnlyMemory-Carry Select Adder-Quantitative Trait Loci (DROM-CSLA-QTL) is introduced, which utilizeslower area than the existing method. The proposed system is implemented using DROM-CSLA, whichoccupies less area. The DROM-CLSA-QTL algorithm is implemented using tools such as MATLAB andModel Sim. Further for FPGA implementation, Virtex 4, Virtex 5 and Virtex 6 devices are used todetermine the number of Lookup Tables (LUTs), slices, flip-flops, area and frequency. Mean, Variance andCovariance are evaluated in the MATLAB.