An Asynchronous Dual?Rail Transition Logic (ADTL) is proposed in this paper. The new logic style can be used in the encryption circuit of cryptography to counter the differential power analysis (DPA) attacks. The resistance to the DPA attacks is achieved by randomizing the power dissipated in the circuit through Manchester input signal coding and unpredictable initial state of the toggle flip-flops (T-FF). The proposed logic uses two wires to transmit the signal, in the form of a single transition on either one of the two wires to indicate the input logic value. T-FFs are employed to randomize the power dissipated by the circuit. The randomizing is made possible by making the initial states of the flip-flops un-deterministic. Furthermore, the clock is completely eliminated in the conceived design, thus realizing increased power randomization and resistance to the DPA attacks. The design is demonstrated through the systematic simulations on a typical encryption circuit. The validation of the ADTL is made through extensive comparisons with the existing Dual-rail Transition Logic (DTL) for power, delay and the DPA resistance. Industry standard EDA tools with 90nm technology libraries provided by the UMC foundry have been employed in the designs.
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