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A low-power reference buffer with high PSRR and low crosstalk for time-interleaved ADCs

机译:具有高PSRR和低串扰的低功耗基准缓冲器,适用于时间交错ADC

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References(4) Cited-By(1) A low power reference buffer is proposed to achieve high PSRR and less crosstalk between channels for time-interleaved analog-to-digital converters (ADCs). A conventional approach requires enough bandwidth in feedback amplifiers to suppress high frequency supply noise, which tends to increase power consumption. Furthermore the number of output drivers that share error amplifier output is unavoidably limited due to the coupling across ADC channels. We propose design techniques to improve the corner frequency of power supply rejection ratio (PSRR) by a factor of 100 and the cross-channel isolation by 20dB without drawing more current.
机译:参考文献(4)引用依据(1)提出了一种低功耗参考缓冲器,以实现高时间间隔交错的模数转换器(ADC)的PSRR和较小的通道间串扰。传统方法需要反馈放大器中有足够的带宽来抑制高频电源噪声,这往往会增加功耗。此外,由于跨ADC通道的耦合,不可避免地限制了共享误差放大器输出的输出驱动器的数量。我们提出了一些设计技术,以在不消耗更多电流的情况下将电源抑制比(PSRR)的转折频率提高100倍,将跨通道隔离度提高20dB。

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