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A Nanotechnology Enhancement to Moore's Law

机译:纳米技术对摩尔定律的增强

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Intel Moore observed an exponential doubling in the number of transistors in every 18 months through the size reduction of transistor components since 1965. In viewing of mobile computing with insatiate appetite, we explored the necessary enhancement by an increasingly maturing nanotechnology and facing the inevitable quantum-mechanical atomic and nuclei limits. Since we cannot break down the atomic size barrier, the fact implies a fundamental size limit at the atomicucleus scale. This means, no more simple 18-month doubling, but other forms of transistor doubling may happen at a different slope. We are particularly interested in the nano enhancement area. (i) 3 Dimensions: If the progress in shrinking the in-plane dimensions is to slow down, vertical integration can help increasing the areal device transistor density. As the devices continue to shrink into the 20 to 30 nm range, the consideration of thermal properties and transport in such devices becomes increasingly important. (ii) Quantum computing: The other types of transistor material are rapidly developed in laboratories worldwide, for example, Spintronics, Nanostorage, HP display Nanotechnology, which are modifying this Law. We shall consider the limitation of phonon engineering fundamental information unit “Qubyte” in quantum computing, Nano/Micro Electrical Mechanical System (NEMS), Carbon Nanotubes, single-layer Graphenes, single-strip Nano-Ribbons, and so forth.
机译:英特尔摩尔(Intel Moore)观察到,自1965年以来,由于晶体管组件的尺寸减小,晶体管数量每18倍呈指数级增长。鉴于食欲不振的移动计算,我们探索了日趋成熟的纳米技术和不可避免的量子技术带来的必要增强。机械原子和核极限。由于我们无法打破原子尺寸的壁垒,因此事实暗示了原子/核尺寸的基本尺寸限制。这意味着不再需要简单的18个月加倍,而是其他形式的晶体管加倍可能会在不同的斜率处发生。我们对纳米增强领域特别感兴趣。 (i)3个尺寸:如果缩小平面内尺寸的进度变慢,则垂直集成可以帮助增加面器件晶体管的密度。随着器件不断缩小到20至30nm的范围,在此类器件中考虑热性能和传输变得越来越重要。 (ii)量子计算:其他类型的晶体管材料正在全球实验室中迅速发展,例如Spintronics,Nanostorage,HP display Nanotechnology,它们正在修改该法。我们将考虑声子工程基础信息单元“ Qubyte”在量子计算,纳米/微机电系统(NEMS),碳纳米管,单层石墨烯,单条纳米带等方面的局限性。

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