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A Low-Power Ultrawideband Low-Noise Amplifier in 0.18 μm CMOS Technology

机译:采用0.18μmCMOS技术的低功耗超宽带低噪声放大器

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This paper presents an ultrawideband low-noise amplifier chip using TSMC 0.18 μm CMOS technology. We propose a UWB low noise amplifier (LNA) for low-voltage and low-power application. The present UWB LNA leads to a better performance in terms of isolation, chip size, and power consumption for low supply voltage. This UWB LNA is designed based on a current-reused topology, and a simplified RLC circuit is used to achieve the input broadband matching. Output impedance introduces the LC matching method to reduce power consumption. The measured results of the proposed LNA show an average power gain (S21) of 9 dB with the 3 dB band from 3 to 5.6 GHz. The input reflection coefficient (S11) less than −9 dB is from 3 to 11 GHz. The output reflection coefficient (S22) less than −8 dB is from 3 to 7.5 GHz. The noise figure 4.6–5.3 dB is from 3 to 5.6 GHz. Input third-order-intercept point (IIP3) of 2 dBm is at 5.3 GHz. The dc power consumption of this LNA is 9 mW under the supply of a 1 V supply voltage. The chip size of the CMOS UWB LNA is1.03×0.78 mm2in total.
机译:本文提出了一种采用台积电0.18μmCMOS技术的超宽带低噪声放大器芯片。我们建议针对低压和低功耗应用的UWB低噪声放大器(LNA)。当前的UWB LNA在隔离,芯片尺寸和低电源电压功耗方面带来了更好的性能。该UWB LNA基于重用电流的拓扑设计,并且使用简化的RLC电路来实现输入宽带匹配。输出阻抗引入了LC匹配方法以降低功耗。所提出的LNA的测量结果显示,在3至5.6 GHz的3 dB频段内,平均功率增益(S21)为9 dB。小于-9 dB的输入反射系数(S11)为3至11 GHz。小于-8dB的输出反射系数(S22)为3〜7.5GHz。噪声系数4.6–5.3 dB在3至5.6 GHz之间。 2 dBm的输入三阶截取点(IIP3)位于5.3 GHz。在1 V电源电压下,该LNA的直流功耗为9 mW。 CMOS UWB LNA的芯片尺寸总计为1.03×0.78 mm2。

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