Chip-Package Codesign Flow for Mixed-Signal SiP Designs

摘要

THE TREND toward smaller feature sizes has driven the development of SoC designs for the past 15 years. Unfortunately, this approach has also led to technological, economic, and legal issues that are still unresolved. Overcoming these obstacles has meant integrating more than one chip into a package, the now-familiar system on a package (SoP) or system in a package (SiP). SiP development poses new challenges for design engineers because chip and package design are separate processes. Typically, designers follow a chip-driven design flow and regard package design as a small add-on to the overall design process. This approach must change if designers are to exploit all of the SiP design paradigm's advantages.