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首页> 外文期刊>IEEE Transactions on Control Systems Technology >Embedding Approximate Nonlinear Model Predictive Control at Ultrahigh Speed and Extremely Low Power
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Embedding Approximate Nonlinear Model Predictive Control at Ultrahigh Speed and Extremely Low Power

机译:在超高速度和极低功率下嵌入近似非线性模型预测控制

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摘要

Embedded systems require control algorithms that are safe and able to operate in embedded platforms with extreme limitations on energy, memory, and area footprint. Nonlinear model predictive control (NMPC) algorithms respect operational constraints to ensure safety but are typically challenging to implement on resource-constrained embedded systems at high speeds. This brief introduces a formalism for deploying an approximate NMPC control law on severely resource-constrained hardware by systematically leveraging approximate computing tools. The resulting field-programmable gate array (FPGA) implementation operates at extremely low power, is ultrafast, requires very small on-chip area, and consumes lower memory than cutting-edge implementations of embedded NMPC for systems of similar state-space dimension. Feasibility and stability guarantees are provided for the embedded controller by preemptively bounding the allowable approximation error in the hardware design phase. An FPGA-in-the-loop implementation exhibits speeds in nanosecond range with power consumption in <1 mW for 2-D and 3-D nonlinear systems.
机译:嵌入式系统需要控制算法,该算法安全且能够在嵌入式平台中运行,具有极限的能量,存储器和区域占地面积。非线性模型预测控制(NMPC)算法尊重操作约束,以确保安全性,但通常具有挑战性地在高速下实现资源受限嵌入式系统。本简述通过系统地利用近似计算工具,引入了在严重资源受限的硬件上部署近似NMPC控制法的形式主义。得到的现场可编程门阵列(FPGA)实现以极低功率运行,超快,需要非常小的片上面积,并且比嵌入式NMPC的尖端实现消耗更低的存储器,用于类似状态空间尺寸的系统。通过抢先地限制硬件设计阶段的允许近似误差,为嵌入式控制器提供了可行性和稳定性保证。 FPGA in-Loop实现在纳秒范围内具有速度,对于2-D和3-D非线性系统,在<1 MW中具有功耗。

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