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Parallelizing dense and banded linear algebra libraries using SMPSs

机译:使用SMPS并行化稠密和带状线性代数库

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摘要

The promise of future many-core processors, with hundreds of threads running concurrently, has led the developers of linear algebra libraries to rethink their design in order to extract more parallelism, further exploit data locality, attain better load balance, and pay careful attention to the critical path of computation. In this paper we describe how existing serial libraries such as (C)LAPACK and FLAME can be easily parallelized using the SMPSs tools, consisting of a few OpenMP-like pragmas and a runtime system. In the LAPACK case, this usually requires the development of blocked algorithms for simple BLAS-level operations, which expose concurrency at a finer grain. For better performance, our experimental results indicate that column-major order, as employed by this library, needs to be abandoned in benefit of a block data layout. This will require a deeper rewrite of LAPACK or, alternatively, a dynamic conversion of the storage pattern at run-time. The parallelization of FLAME routines using SMPSs is simpler as this library includes blocked algorithms (or algorithms-by-blocks in the FLAME argot) for most operations and storage-by-blocks (or block data layout) is already in place.
机译:未来的具有数百个线程并发运行的多核处理器的承诺,导致线性代数库的开发人员重新考虑其设计,以提取更多的并行性,进一步利用数据局部性,获得更好的负载平衡并特别注意计算的关键路径。在本文中,我们描述了如何使用SMPS工具轻松地并行化现有的串行库,例如(C)LAPACK和FLAME,该工具由一些类似OpenMP的编译指示和运行时系统组成。在LAPACK情况下,这通常需要开发用于简单BLAS级操作的分块算法,从而以更精细的粒度公开并发。为了获得更好的性能,我们的实验结果表明,需要放弃此库采用的列优先顺序,以便利用块数据布局。这将需要对LAPACK进行更深的重写,或者在运行时对存储模式进行动态转换。使用SMPS进行FLAME例程的并行化更为简单,因为该库包含针对大多数操作的分块算法(或FLAME Argot中的逐块算法),并且逐块存储(或块数据布局)已经到位。

著录项

  • 来源
    《Concurrency and Computation》 |2009年第18期|2438-2456|共19页
  • 作者单位

    Barcelona Supercomputing Center, Centro Nacional de Supercomputacion (BSC-CNS) and Universitat Politecnica de Catalunya, Nexus II Building, C. Jordi Girona 29, 08034 Barcelona, Spain Consejo Superior de Investigaciones Cientificas (CSIC), Spain;

    Departmento de Arquitectura de Computadores, Universitat Politecnica de Catalunya, 08034 Barcelona, Spain;

    Barcelona Supercomputing Center, Centro Nacional de Supercomputacion (BSC- CNS) and Universitat Politecnica de Catalunya, Nexus II Building, C. Jordi Girona 29, 08034 Barcelona, Spain;

    Barcelona Supercomputing Center, Centro Nacional de Supercomputacion (BSC- CNS) and Universitat Politecnica de Catalunya, Nexus II Building, C. Jordi Girona 29, 08034 Barcelona, Spain;

    Departmento de Ingeniena y Ciencia de Computadores, Universidad Jaume I, 12.071 Castellon, Spain;

    Departmento de Ingeniena y Ciencia de Computadores, Universidad Jaume I, 12.071 Castellon, Spain;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    linear algebra libraries; programmability; high performance; dynamic scheduling; multi-core processors;

    机译:线性代数库可编程性高性能;动态调度;多核处理器;

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