机译:ECAP:切片式多处理器中预取块的节能缓存
Indian Inst Technol Dept Comp Sci & Engn MARS Res Lab Gauhati India;
Univ Catania Dept Elect Elect & Comp Engn Catania Italy;
cache storage; virtual storage; energy conservation; power consumption; power aware computing; telecommunication traffic; multiprocessing systems; microprocessor chips; ECAP; tiled chip multiprocessor; energy consumption; system performance; nonuniform load distribution; L1 cache usage pattern; prefetching; cache pollution; cache misses; network traffic; power consumption; average memory access time; virtual cache memories; memory footprint; prefetch placement technique; prefetch block placement strategy; memory access latency; packet movement rate; energy-efficient caching for prefetch blocks;
机译:EECache:芯片多处理器中节能最后一级缓存的体系结构设计的综合研究
机译:PS高速缓存:一种用于芯片多处理器的节能高速缓存设计
机译:用于3D芯片多处理器的基于STT-RAM的节能混合缓存体系结构
机译:EECACHE:利用芯片多处理器节能最后级别高速缓存的设计选择
机译:共享内存多处理器的自适应和集成数据高速缓存预取
机译:Web地理信息系统中图块预取的全局用户驱动模型
机译:基于共享缓存的芯片多处理器的自适应预取
机译:大规模共享存储器多处理器中高速缓存和数据预取缓冲区的有效性