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Experiments with the Fresh Breeze tree-based memory model

机译:使用Fresh Breeze树型记忆模型进行实验

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摘要

The Fresh Breeze memory model and system architecture is proposed as an approach to achieving significant improvements in massively parallel computation by supporting fine-grain management of memory and processing resources and utilizing a global shared name space for all processors and computation tasks. Memory management and the scheduling of tasks are done by hardware realizations, eliminating nearly all operating system execution cycles for data access, task scheduling and security. In particular, the Fresh Breeze memory model uses trees of fixed-size chunks of memory to represent all data objects, which eliminates data consistency issues and simplifies memory management. Low-cost reference-count garbage collection is used to support modular programming in type-safe programming languages. The main contributions of this paper are: (1) a program exection model for massively parallel computing as the Fresh Breeze application programming interface (API) comprising a radical memory model and a scheme for expressing concurrency; (2) an experimental implementation of the API through simulation using the FAST simulator of the IBM Cyclops 64 many-core chip; (3) simulation results that demonstrate that (a) fine-grain hardware-implemented resource management mechanisms can support massive parallelism and high processor utilization through the latency-hiding properties of multi-tasking; and (b) hardware implementation of a work stealing scheme incorporated in our simulation can effectively distribute tasks over the processors of a many-core parallel computer.
机译:提出了Fresh Breeze内存模型和系统体系结构,作为通过支持内存和处理资源的细粒度管理并将全局共享名称空间用于所有处理器和计算任务来实现大规模并行计算的重大改进的方法。内存管理和任务调度是通过硬件实现来完成的,几乎消除了所有操作系统在数据访问,任务调度和安全性方面的执行周期。特别是,Fresh Breeze内存模型使用固定大小的内存块树来表示所有数据对象,从而消除了数据一致性问题并简化了内存管理。低成本的引用计数垃圾回收用于支持类型安全编程语言中的模块化编程。本文的主要贡献是:(1)作为Fresh Breeze应用程序编程接口(API)的大规模并行计算程序执行模型,包括基本存储模型和表示并发的方案; (2)通过使用IBM Cyclops 64多核芯片的FAST仿真器进行仿真来对API进行实验性实现; (3)仿真结果表明:(a)细粒度的硬件实现的资源管理机制可以通过多任务的延迟隐藏特性支持大规模并行处理和较高的处理器利用率; (b)在我们的仿真中采用的工作窃取方案的硬件实现可以在多核并行计算机的处理器上有效地分配任务。

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  • 来源
    《Computer science》 |2011年第4期|p.325-337|共13页
  • 作者单位

    Computer Science and Artificial Intelligence Laboratory, MIT, Room 32-G868, 32 Vassar Street, Cambridge, MA 02139, USA;

    Department of Electrical and Computer Engineering, University of Delaware, 140 Evans Hall, Newark, DE 19716, USA;

    Department of Electrical and Computer Engineering, University of Delaware, 140 Evans Hall, Newark, DE 19716, USA;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    memory models; storage system; massive parallelism; concurrency model; system simulation;

    机译:记忆模型存储系统;大规模并行性;并发模型;系统仿真;
  • 入库时间 2022-08-17 13:50:22

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