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机译:3-D-IC中基于硅通孔的去耦电容器堆叠芯片
Department of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon, Korea|c|;
3-D integrated circuit (3-D-IC); decoupling capacitor; decoupling capacitor stacked chip (DCSC); deep trench (DT) capacitor; low equivalent series inductance (ESL); off-chip discrete decoupling capacitor; on-chip NMOS capacitor; power distribution network (PDN); power integrity; power/ground noise; self-impedance (Z11); simultaneous switching noise (SSN); stacking; through-silicon-via (TSV);
机译:基于片上去耦电容器模型的基于TSV的PDN系统各种堆叠拓扑的多层研究
机译:具有集成去耦电容器和通过互连的Thru-Si的三维芯片堆叠
机译:混合信号堆叠式3-D-IC中片上开关模式电源的垂直噪声耦合
机译:3D-IC中基于TSV的去耦电容器堆叠芯片(DCSC)的PDN分析
机译:3-D集成电路中片上去耦电容器的有效距离计算。
机译:用于传感应用的可靠且即时互连的微波平台与微波-微流体叉指电容器芯片的组合
机译:分配去耦电容以减少芯片上的同时开关噪声