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Influence of Extended Bias Stress on the Electrical Parameters of Mixed Oxide Thin Film Transistors

机译:偏压偏差对混合氧化物薄膜晶体管电学参数的影响

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This paper investigates the variation of electrical characteristic of indium gallium zinc oxide (IGZO) thin film transistors (TFTs) under gate bias stress. The devices are subjected to positive and negative gate bias stress for prolonged time periods. The effect of bias stress time and polarity on the transistor current equation is investigated and the underlying effects responsible for these variations are determined. Negative gate stress produces a positive shift in the threshold voltage. This can be noted as a variation from prior studies. Due to variation of power factor (n) from two, the integral method is implemented to extract threshold voltage (v_t) and power factor (n). Effective, mobility (u_(eff)), drain to source resistance (R_(DS)) and constant k' is also extracted from the device characteristics. The unstressed value of n is determined to be 2.5. The power factor increases with gate bias stress time. The distribution of states in the conduction band is revealed by the variation in power factor.
机译:本文研究了在栅极偏置应力下铟镓锌氧化物(IGZO)薄膜晶体管(TFT)的电特性的变化。器件会长时间承受正和负栅极偏置应力。研究了偏置应力时间和极性对晶体管电流方程的影响,并确定了造成这些变化的潜在影响。栅极负电压会在阈值电压中产生正向偏移。可以注意到,这是与先前研究的不同之处。由于功率因数(n)不同于2,因此采用积分方法提取阈值电压(v_t)和功率因数(n)。有效的迁移率(u_(eff)),漏极到源极的电阻(R_(DS))和常数k'也可以从器件特性中提取出来。 n的无应力值确定为2.5。功率因数随栅极偏置应力时间而增加。导通带中的状态分布通过功率因数的变化来揭示。

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