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Analytical and Numerical Model Confrontation for Transfer Impedance Extraction in Three-Dimensional Radio Frequency Circuits

机译:三维射频电路中传输阻抗提取的分析和数值模型对抗

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3D chip stacking is considered known to overcome conventional 2D-IC issues, using through silicon vias to ensure vertical signal transmission. From any point source, embedded or not, we calculate the impedance spread out; our ultimate goal will to study substrate noise via impedance field method. For this, our approach is twofold: a compact Green function or a Transmission Line Model over a multi-layered substrate is derived by solving Poisson's equation analytically. The Discrete Cosine Transform (DCT) and its variations are used for rapid evaluation. Using this technique, the substrate coupling and loss in IC's can be analyzed. We implement our algorithm in MATLAB; it permits to extract impedances between any pair of embedded contacts. Comparisons are performed using finite element methods.
机译:3D芯片堆叠被认为可以克服常规2D-IC问题,它使用硅通孔来确保垂直信号传输。从任何点源(无论是否嵌入),我们都可以计算出阻抗分布。我们的最终目标是通过阻抗场方法研究基板噪声。为此,我们的方法是双重的:通过解析求解泊松方程,可以得出紧凑的格林函数或多层基板上的传输线模型。离散余弦变换(DCT)及其变体用于快速评估。使用这种技术,可以分析衬底的耦合和IC的损耗。我们在MATLAB中实现算法;它允许提取任何一对嵌入式触点之间的阻抗。使用有限元方法进行比较。

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