首页> 外文期刊>Circuits and Devices Magazine, IEEE >Universal AHPL — A language for VLSI design automation
【24h】

Universal AHPL — A language for VLSI design automation

机译:通用AHPL — VLSI设计自动化的语言

获取原文
获取原文并翻译 | 示例
           

摘要

UAHPL (Universal Hardware Programming Language) is an extension of AHPL (A Hardware Programming Language). It is a register transfer language, which allows one to specify many low-level details for efficient implementation of digital systems in MOS technology. Large iterative circuits, such as arithmetic logic units (ALUs), can be expressed conveniently in an Algol-like notation. The language has been implemented by means of a multistage compiler, which supports a wide spectrum of design activities including testing. The paper discusses the salient features of the language and translates the UAHPL description into n-MOS layouts.
机译:UAHPL(通用硬件编程语言)是AHPL(硬件编程语言)的扩展。它是一种寄存器传输语言,它允许人们指定许多低级详细信息,以便在MOS技术中有效实施数字系统。大型迭代电路,例如算术逻辑单元(ALU),可以方便地以类似Algol的符号表示。该语言已通过多级编译器实现,该编译器支持包括测试在内的各种设计活动。本文讨论了该语言的显着特征,并将UAHPL描述转换为n-MOS布局。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号