A compact neural network for partial-response maximum-likelihooddetectors: algorithmic study

摘要

A compact neural network algorithm for partial-responsenmaximum-likelihood (PRML) sequence detection is presented. Compactnneural networks are a class of locally connected neural networksnsuitable for very large scale integration (VLSI) implementation. Thenhardware complexity for VLSI implementation of the proposed algorithmngrows linearly with the level of the deliberately designed symbolninterference effects of the partial-response (PR) signalling scheme.nLarge dedicated memory for storage of likelihood matrices in digitalnViterbi-algorithm-based detectors is not needed for the proposedndetector. Detailed analysis on network stability for network topologynand time constant of an analog neuron is described. This detectornalgorithm has competitive bit-error rate performance when compared withnthe digital Viterbi algorithm under the noise condition for manynreal-world applications. The proposed algorithm is suitable for analognVLSI implementation because of its low time complexity and linear areancomplexity for the detection of PRML signalling schemes