A New DAC Mismatch Shaping Technique for Sigma–Delta Modulators

摘要

A new $SigmaDelta$ modulator architecture that shapes digital-to-analog converter (DAC) mismatches in a manner similar to quantization noise shaping is proposed, allowing operation with low oversampling ratios, high-resolution quantizers, and compact logic. It is shown that the proposed architecture entails a smaller feedback logic delay than data-weighted-averaging techniques, providing a fourfold delay reduction for a 6-bit feedback DAC. The front-end integrator implementation also exhibits 25% less $kT/C$ noise than conventional architectures.