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Techniques for improving mismatch shaping of dynamic element matching circuit within delta-sigma modulator

机译:改善delta-sigma调制器中动态元件匹配电路失配整形的技术

摘要

A delta-sigma modulator includes a receiving circuit, a loop filter, a quantizer, a dynamic element matching circuit and a digital to analog converter. The receiving circuit is arranged for receiving a feedback signal and an input signal to generate a summation signal. The loop filter is arranged for receiving the summation signal to generate a filtered summation signal. The quantizer is arranged for generating a digital output signal according to the filtered summation signal. The dynamic element matching circuit is arranged for receiving the digital output signal to generate a shaped digital output signal for shaping element mismatch. The digital to analog converter is arranged for performing a digital to analog converting operation upon a signal derived from the shaped digital output signal to generate the feedback signal to the receiving circuit, wherein clock signals used by the quantizer and the dynamic element matching circuit have different frequencies.
机译:Δ-∑调制器包括接收电路,环路滤波器,量化器,动态元件匹配电路和数模转换器。接收电路被布置为接收反馈信号和输入信号以产生求和信号。环路滤波器被布置为接收求和信号以生成滤波后的求和信号。量化器被布置为根据滤波后的求和信号生成数字输出信号。动态元件匹配电路被布置用于接收数字输出信号以生成用于整形元件失配的整形的数字输出信号。数模转换器被布置用于对从整形的数字输出信号得到的信号执行数模转换操作,以生成到接收电路的反馈信号,其中,量化器和动态元件匹配电路所使用的时钟信号具有不同的时钟信号。频率。

著录项

  • 公开/公告号US9985645B2

    专利类型

  • 公开/公告日2018-05-29

    原文格式PDF

  • 申请/专利权人 MEDIATEK INC.;

    申请/专利号US201715652252

  • 发明设计人 PAO-CHENG CHIU;HUNG-YI HSIEH;

    申请日2017-07-18

  • 分类号H03M3/00;

  • 国家 US

  • 入库时间 2022-08-21 12:56:30

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