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首页> 外文期刊>Circuits and Systems II: Express Briefs, IEEE Transactions on >Systematic Design Centering of Continuous Time Oversampling Converters
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Systematic Design Centering of Continuous Time Oversampling Converters

机译:连续时间过采样转换器的系统设计中心

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摘要

We address the practical problem of determining the loop filter component values in a single-loop continuous-time delta sigma modulator. Conventional techniques to design center the converter to achieve a desired noise transfer function are cumbersome and not numerically stable. We present a robust procedure that can be used to determine the loop filter coefficients when real opamps (with finite gain, arbitrary Digital to Analog Converter (DAC) pulse, and multiple internal poles/zeros) are used. The method can also account for excess loop delay. We illustrate our technique with second-order low-pass and fourth-order bandpass examples.
机译:我们解决了在单回路连续时间增量sigma调制器中确定回路滤波器分量值的实际问题。设计转换器居中以实现所需的噪声传递函数的常规技术麻烦且数值不稳定。当使用实际运算放大器(具有有限增益,任意数模转换器(DAC)脉冲以及多个内部极点/零点)时,我们提供了一种可靠的过程,可用于确定环路滤波器系数。该方法还可以解决过多的环路延迟。我们通过二阶低通和四阶带通示例来说明我们的技术。

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