A Novel Sourceline Voltage Compensation Circuit and a Wordline Voltage-Generating System for Embedded nor Flash Memory

摘要

Key blocks used for embedded nor Flash memory are introduced in this brief, including a novel sourceline (SL) voltage compensation circuit and a wordline (WL) voltage-generating system. The SL voltage compensation circuit controls the output voltage of the charge pump according to the number of cells to be programmed with data “0” to compensate the IR drop on the SL decoding path. Thus, a stable SL voltage is obtained and high program efficiency with low program disturb is realized. In order to get low power consumption in standby mode and high speed in active mode, a high-performance WL voltage-generating system has been proposed. A 1.8-V 64 $times$ 32 kb embedded nor Flash memory employing the two techniques has been developed based on a GSMC 0.18- $muhbox{m}$ 4-poly 4-metal CMOS process. Average standby current of the embedded Flash memory IP circuit less than 0.3 $muhbox{A}$ is achieved at 1.8 V and 25 $^{circ}hbox{C}$.