Low-voltage - read cascodes, for example circuit with 2v / 3v operating voltages and various memory bank combinations without metallization for simultaneous flash - memory

摘要

A pre-amplifier portion (274U) of a sense amplifier (174) for a dual bank (194, 196) architecture simultaneous operation flash memory device (100) is disclosed. The sense pre-amplifier circuit comprises two inverting amplifiers, the second inverting amplifier (313, 316) providing a feedback loop for the first inverting amplifier (311, 314). In addition, special 'kicker' circuitry (313, 315) raises the sense pre-amplifier's input signal line (275U) to its operating level. The combination of inverting amplifiers, feedback loop and level raising circuitry is configured to provide higher bandwidths for the sense pre-amplifier to accommodate low capacitive loading resulting from a small memory bank (194). The combination is also configured to provide faster raising of the input signal line to operating level to accommodate high capacitive loading resulting from a large memory bank (196). The combination is also configured to provide increased signal margins at the output (USAin) of the sense pre-amplifier.