Ultralow In-Band Phase Noise Injection-Locked Frequency Multiplier Design Based on Open-Loop Frequency Calibration

摘要

A new design methodology is proposed for an ultralow in-band phase noise injection-locked frequency multiplier (ILFM) based on open-loop frequency calibration. The prototype ILFM was designed and fabricated in the 65-nm CMOS process. Using an open-loop calibrator without a real-time monitoring loop, the ILFM achieved excellent in-band phase noise with low power consumption and a small silicon area. Following the design procedure based on the phase noise analysis, the proposed ILFM showed that the open-loop calibrator was capable of overcoming phase noise degradation due to process–voltage–temperature variations. The output frequency was 3.0 GHz when the oscillator was injection locked by the 15th harmonic of the 200-MHz reference clock. The in-band phase noise performance was $-$117.0, $-$122.6, and $-$124.5 dBc/Hz at 10-, 100-, and 1-MHz offsets, respectively. The total active area was 0.19 $hbox{mm}^{2}$, and the power consumption was 8.1 mW.