A 48 Gb/s PAM-4 Transmitter With 3-Tap FFE Based on Double-Shielded Coplanar Waveguide in 65-nm CMOS

摘要

A power and area-efficient pulse-amplitude modulation 4 (PAM-4) transmitter using 3-tap feed-forward equalizer (FFE) based on a slow-wave transmission line is presented. Passive delay line is adopted for generating equalizer tap to overcome the high clocking power consumption. The transmission line achieves high slow-wave factor of 15 with double floating metal shields around the differential coplanar waveguide. The physical dimensions of the transmission line are determined to have low loss and a high slow-wave factor with a small chip area by optimization with 3-D electromagnetic simulations. The transmitter includes 4:1 multiplexers (MUXs) and a quadrature clock generator for high-speed data generation in a quarter-rate system. The 4:1 MUX utilizes 2-UI pulse generator and the input configuration is determined by qualitative analysis. The chip is fabricated in 65-nm CMOS technology and occupies area of 0.151 mm(2). The proposed transmitter system exhibits the energy efficiency of 3.03 pJ/b at the data rate of 48 Gb/s with PAM-4 signaling.