A 12.1 fJ/Conv.-Step 12b 140 MS/s 28-nm CMOS Pipelined SAR ADC Based on Energy-Efficient Switching and Shared Ring Amplifier

摘要

This brief presents an ultra-low-power two-channel 12b 140 MS/s 28-nm CMOS analog-to-digital converter (ADC) for use in next-generation mobile communications systems. The proposed ADC employs a two-stage pipelined successive-approximation register (SAR) A