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首页> 外文期刊>IEEE Transactions on Applied Superconductivity >Stacked SNS Josephson junction arrays for quantum voltage standards
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Stacked SNS Josephson junction arrays for quantum voltage standards

机译:用于量子电压标准的堆叠式SNS Josephson结阵列

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摘要

NIST is using and developing superconductor-normal metal-superconductor (SNS) Josephson arrays for both programmable DC and AC voltage standards. Increasing the output voltage is difficult because the output voltage per junction is small; hence series arrays with large numbers of junctions are needed. The best way to generate higher voltages and achieve the best operating margins for the broadband drive signals is by densely packing the junctions into shorter arrays. NIST has been working on stacked SNS junctions to achieve this goal. By stacking junctions in the array, more junctions may be placed per length, while preserving a lumped microwave element. In this paper we introduce our results on stacked SNS junctions using MoSi2 and Ti as barrier materials. These barriers were chosen because they can be reactive-ion etched (RIE) in contrast to our standard PdAu barriers, which must be wet etched. Using RIE, alternating layers of barrier material and Nb may be etched in a single step. We indirectly quantify the junction uniformity in the arrays by measuring the current range of the constant-voltage steps when the arrays are biased with a microwave drive.
机译:NIST正在使用和开发用于可编程DC和AC电压标准的超导体常态金属超导体(SNS)约瑟夫森阵列。由于每个结的输出电压很小,因此很难增加输出电压。因此,需要具有大量结的串联阵列。产生更高电压并为宽带驱动信号获得最佳工作裕量的最佳方法是将结点密集地封装在较短的阵列中。 NIST一直致力于堆叠式SNS交叉路口,以实现这一目标。通过将结点堆叠在阵列中,可以在每个长度上放置更多的结点,同时保留集总的微波元件。在本文中,我们介绍了使用MoSi2和Ti作为阻挡层材料的堆叠SNS结的研究结果。选择这些势垒是因为与可以湿法刻蚀的标准PdAu势垒相比,它们可以进行反应离子刻蚀(RIE)。使用RIE,可以在单个步骤中蚀刻阻挡材料和Nb的交替层。当阵列被微波驱动器偏置时,我们通过测量恒压阶跃的电流范围来间接量化阵列中的结均匀性。

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