Ga_2O_3(Gd_2O_3)/Si_3N_4dual-layer gate dielectric for InGaAs enhancement mode metal-oxide-semiconductor field-effect transistor with channel inversion

摘要

A dual-layer gate dielectric approach for application in Ⅲ-Ⅴ metal-oxide-semiconductor field-effect transistor (MOSFET) was studied by using ultrahigh vacuum deposited 7-8 nm thick Ga_2O_3(Gd_2O_3) as the initial dielectric to unpin the surface Fermi level of In_(0.18)Ga_(0.82)As and then molecular-atomic deposition of ～2-3 nm thick Si_3N_4 as a second dielectric protecting Ga_2O_3(Gd_2O_3). The total equivalent oxide thickness achieved in this study is 5 nm. We have demonstrated an enhancement mode In_(0.18)Ga_(0.82)As/GaAs MOSFET with surface inverted n channel with drain current (I_d) of 0.1 mA for a gate length of 10 μm and a gate width of 880 μrn at V_(ds) = 1 V and V_g=4.5 V.