Effects of substrate leakage and drain-side thermal barriers in In_(0.53)Ga_(0.47)As/GaAs_(0.5)Sb_(0.5) quantum-well tunneling field-effect transistors

摘要

The device leakage current and the ON-state characteristics of In_(0.53)Ga_(0.47)As/GaAs_(0.5)Sb_(0.5) quantum-well tunneling field-effect transistors (QWTFETs) are examined on the basis of temperature-dependent measurements. Different from commonly observed Shockley-Reed-Hall (SRH) recombination in the OFF-state, substrate leakage is identified as the source of OFF-current, which limits the steepness of the device transfer characteristics. In addition, analysis of the TFET operation in the linear regime reveals a current barrier due to an ungated region near the drain, which accounts for the unexpected parasitic resistance and current saturation at low temperatures. This barrier can be eliminated by reducing the gate-to-drain distance, as illustrated by device simulations. The applied methodology provides a design guideline for the gate-to-drain alignment tolerance in TFETs.