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首页> 外文期刊>IEEE Aerospace and Electronic Systems Magazine >Real-Time STAP demonstration on an embedded high performance computer
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Real-Time STAP demonstration on an embedded high performance computer

机译:嵌入式高性能计算机上的实时STAP演示

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摘要

Real-time signal processing for a 16-channel phased array radar, including space-time adaptive processing (STAP) algorithms, has been implemented using a 29-node ruggedized version of an Intel Paragon. Techniques employed to efficiently implement each step of the signal processing are discussed. An overall throughput of 3.15 GFLOPS and processing efficiency of 48% has been achieved, indicating that embedded high performance computers can deliver a significant percentage of their advertised peak throughput under real system constraints.
机译:16通道相控阵雷达的实时信号处理,包括时空自适应处理(STAP)算法,已使用29节点加固型Intel Paragon实现。讨论了有效实现信号处理每个步骤的技术。已经实现了3.15 GFLOPS的总吞吐量和48%的处理效率,这表明嵌入式高性能计算机可以在实际系统约束下实现其广告峰值吞吐量的很大一部分。

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