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A computational paradigm for dynamic logic-gates in neuronal activity

机译:神经元活动中动态逻辑门的计算范例

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摘要

In 1943 McCulloch and Pitts suggested that the brain is composed of reliable logic-gates similar to the logic at the core of today's computers. This framework had a limited impact on neuroscience, since neurons exhibit far richer dynamics. Here we propose a new experimentally corroborated paradigm in which the truth tables of the brain's logic-gates are time dependent, i.e., dynamic logic-gates (DLGs). The truth tables of the DLGs depend on the history of their activity and the stimulation frequencies of their input neurons. Our experimental results are based on a procedure where conditioned stimulations were enforced on circuits of neurons embedded within a large-scale network of cortical cells in-vitro. We demonstrate that the underlying biological mechanism is the unavoidable increase of neuronal response latencies to ongoing stimulations, which imposes a non-uniform gradual stretching of network delays. The limited experimental results are confirmed and extended by simulations and theoretical arguments based on identical neurons with a fixed increase of the neuronal response latency per evoked spike. We anticipate our results to lead to better understanding of the suitability of this computational paradigm to account for the brain's functionalities and will require the development of new systematic mathematical methods beyond the methods developed for traditional Boolean algebra.
机译:1943年,McCulloch和Pitts提出大脑是由可靠的逻辑门组成的,类似于当今计算机核心的逻辑。该框架对神经科学的影响有限,因为神经元具有更丰富的动力学。在这里,我们提出了一种新的实验证实的范例,其中大脑逻辑门的真值表与时间有关,即动态逻辑门(DLG)。 DLG的真值表取决于其活动的历史以及其输入神经元的刺激频率。我们的实验结果基于以下程序:在条件下,对嵌入体外的大规模皮层细胞网络中的神经元回路施加条件刺激。我们证明了潜在的生物学机制是神经元反应潜伏期对正在进行的刺激的不可避免的增加,这强加了网络延迟的不均匀逐渐扩展。有限的实验结果通过基于相同神经元的仿真和理论论证得到了证实和扩展,每个诱发尖峰的神经元反应潜伏期均增加了固定值。我们预计我们的结果将导致人们更好地理解这种计算范式对大脑功能的适用性,并且将需要开发新的系统数学方法,而不是为传统布尔代数开发的方法。

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