BackgroundModern EIT systems require simultaneously operating multiple functions for flexibility, interoperability, and clinical applicability. To implement versatile functions, expandable design and implementation tools are needed. On the other hand, it is necessary to develop an ASIC-based EIT system to maximize its performance. Since the ASIC design is expensive and unchangeable, we can use FPGAs as a prior step to the digital ASIC design and carefully classify which functions should be included in the ASIC. In this paper, we describe the details of the FPGA design adopted in the KHU Mark2.5 EIT system.
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